1. Field of the Invention
The present invention relates generally to a memory device having a redundant cell, and more particularly, to a memory device having a redundant file of the same configuration as that of an ordinary cell, the redundant file storing therein replacement information with a redundant cell, the memory device capable of replacing a defective cell with the redundant cell even in the wafer process stage or even after the packaging.
2. Description of the Related Arts
With its increasing capacity, a semiconductor based memory device tends to have a redundant cell for repairing a defective cell. A DRAM for use as a computer cache memory has a redundant cell and stores, in a fuse ROM (redundant ROM), address information on the defective cell replaced with the redundant cell. The supplied address is then compared with the redundant ROM stored address, and if coincident, access to the ordinary cell is prohibited with the permission of access to the redundant cell.
On the other hand, a ferroelectric memory is one of memory devices utilizing a semiconductor and exploits a residual polarization action of a ferroelectric material (hereinafter called merely FeRAM). The ferroelectric memory is paid attention to as a nonvolatile memory which can write at a high speed like a DRAM. In the same manner as in a memory cell of the DRAM, the memory cell of a FeRAM also has a simple configuration composed of a selection transistor and a capacitor, and has possibilities of increasing capacitance. A dielectric of the capacitor uses the ferroelectric material as described above, and when an electric field in a fixed direction is applied to between electrodes of the capacitor, the ferroelectric is polarized, and even after the electric field disappears, the residual polarization is left behind, so that data can be stored. Accordingly, the FeRAM is a nonvolatile memory which can hold stored data even when turned off. Moreover, the FeRAM is shorter in a time to be required for writing or erasing than an EEPROM or a flush memory spreading presently, and is expected as the nonvolatile memory of large capacitance to be replaced with the DRAM.
The FeRAM has just started developing, and a device of so large capacity has not been developed at present. Accordingly, a redundant cell and a replacement configuration to the redundant cell are not proposed. However, as the capacity increases in the future, it is apparent that the redundant cell configuration is necessary even in the FeRAM, and it is necessary to propose the redundant cell and the replacement configuration therefor.
The FeRAM differs from the DRAM as follows: First, as a manufacturing process is yet at an initial stage, it is necessary to form a redundant cell configuration as a circuit configuration as simple as possible. Secondly, in the FeRAM, the defective cell is detected by a wafer test, and also after an acceleration test to be carried out after a memory chip is accommodated in a package, a frequency that the defective cell is detected is not few, and it is necessary to replace the defective cell with the redundant cell even after accommodated in the package.
Accordingly, in using the fuse ROM to be cut off by a laser adopted in the DRAM as the redundancy ROM, it is necessary that a memory of a configuration different from the memory cell is formed in a chip as the redundancy ROM. Furthermore, the defective cell can be repaired only at a wafer stage, and the defective cell cannot be repaired after at accommodated in the package.
Furthermore, even in the DRAM, as long as the redundancy ROM is constituted by the present fuse ROM, first, the defective cell detected after accommodated in the package cannot be repaired. Furthermore, in the normal DRAM, it is generic that a column containing the defective cell is replaced with a redundancy column. In such a replacement method, in the case where the defective cell dispersedly generates within the chip, since the number of replaceable redundancy columns has a limit, it may become impossible to repair. Accordingly, repair probability has naturally a limit.
It is therefore an object of the present invention to provide a memory device in which a redundant cell and a redundant file memory for recording replacement information for the redundant cell is configured by a simple manner.
Furthermore, it is an object of the present invention to provide a memory device which can replace a defective cell with a redundant cell even after a memory chip is accommodated in a package.
Furthermore, it is an object of the present invention to provide a FeRAM in which a redundant file memory for recording replacement information to a redundant cell is realized by a simple configuration.
Furthermore, it is an object of the present invention to provide a FeRAM in which, even after a memory chip is accommodated in a package, a defective cell can be replaced with a redundant cell.
In order to attain the above objects, according to a first aspect of the present invention, a redundant file memory for recording first replacement information having an address of a defective cell to be replaced with a redundant cell is configured by a memory cell having the same configuration as an ordinary memory cell, and when accessing the ordinary memory cell, the redundant file memory can be accessed at the same time. Furthermore, second replacement information indicating whether or not the ordinary cell in correspondence with the stored address is a defective one is recorded in the redundant file memory. When accessing the ordinary memory cell, the first and second replacement information recorded in the redundant file memory are read out at the same time, and the defective cell is replaced with the redundant cell according to the replacement information.
With such configuration, the configuration of the redundant file memory can be same with the ordinary memory cell and the redundant cell, thereby simplifying the redundancy circuit configuration. Furthermore, as the redundant file memory can be written in the same manner as in the ordinary memory cell, even after the memory chip is accommodated in the package, it is possible to replace the defective cell with the redundant cell and to record the replacement information. That is, even after the memory chip is accommodated in the package, the defective cell can be repaired. Furthermore, as the replacement information whether or not the cell is a defective one is recorded in the redundant file memory, the replacement information can be changed for each word line. Accordingly, with such the configuration, it is possible to replace the defective cell with the redundant cell in a cell unit. Accordingly, in the case of such the configuration, it is possible to increase the repair probability of the defective cell more than the case of replacing with the redundant cell in column unit and word unit.
Furthermore, with the above configuration, only the first replacement information indicating the address of the defective cell is recorded in the redundant file memory. Accordingly, the first replacement information can be configured in n bit for the ordinary memory area having 2n replacement units, and an information amount of the defective cell to be replaced can be lessened. The second replacement information indicating whether or not the ordinary cell corresponding to the address is a defective cell is also recorded in the redundant file memory in addition to the first replacement information.
In order to attain the above object, according to a second aspect of the present invention, in a memory circuit having a plurality of blocks each of which includes an ordinary cell region having the ordinary cell and a redundant cell region, the redundant file memories are in common provided in the plurality of blocks. The first replacement information and the second replacement information are recorded in the redundant file memory. The first replacement information has the address of the defective cell in the block and a block address corresponding to the defective cell, and the second replacement information indicates whether or not the cell corresponding to the first replacement information is the defective cell.
According to the more preferred embodiment, in the second aspect, the memory cell includes a transistor connected to a word line and a capacitor connected to the transistor and having a ferroelectric film, and the word lines are in common provided for the plurality of blocks, and source lines connected to the capacitors are provided in each block. The source line of the selected block is driven, and also the source line of the redundant file memory is driven along with the word lines.